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[Other resource] ref-ddr-sdram-vhdl

Description: 用VHDL编写DDR SDRAM Controller的源代码- Compiles DDR SDRAM Controller with VHDL the source code
Platform: | Size: 1031656 | Author: 包盛花 | Hits:

[Other resource] ref-sdr-sdram-vhdl

Description: DDR控制器的VHDL源代码.采用FPGA实现DDR接口控制器,适用于Altera的FPGA,最高频率可到100M-DDR controller VHDL source code. Using FPGA DDR interface controller, applicable to Altera FPGA, the highest frequency available 100M
Platform: | Size: 776642 | Author: 张涛 | Hits:

[Other resource] ddr

Description: 本人正在学习vhdl语言，买了套开发板，这些是配套光盘里的内容，非常难得，网上找不到的-I was learning VHDL language, bought a set of development boards, which are compatible CD-ROM's content, and very rare. not online! !
Platform: | Size: 2317 | Author: 孙强 | Hits:

[Other] ref-ddr-sdram-vhdl

Description: 本程序是DDR SDRAM控制器的VHDL程序，由ALTERA 提供-this procedure is DDR SDRAM controller VHDL procedures provided by Altera
Platform: | Size: 437055 | Author: kevin | Hits:

[Other resource] cpu-leon3-altera-ep2s60-ddr

Description: 一个使用VHDL设计的具有强大功能的32位CPU，这个文件包含了与之配套的DDR控制器程序！
Platform: | Size: 753022 | Author: zhao onely | Hits:

[Other Embeded program] DDR SDRAM控制器的VHDL代码已经测试

Description: DDR SDRAM控制器的VHDL代码已经测试
Platform: | Size: 15466 | Author: bbk2000 | Hits:

[VHDL-FPGA-Verilog] DDR_SDRAM_Controller

Description: DDR RAM控制器的VHDL源码，实现平台是Lattice FPGA，功能验证通过-DDR RAM controller VHDL source code, achieving the platform of Lattice FPGA, functional verification through
Platform: | Size: 677888 | Author: 钟方 | Hits:

[VHDL-FPGA-Verilog] xapp858

Description: xilinx公司的ＤＤＲ实现源码，希望对你的开发有所帮助-Xilinx DDR to achieve the company s source code, and they hope to be helpful to your development
Platform: | Size: 64512 | Author: feng | Hits:

[Other Embeded program] DDram

Description: 07全国大学生电子设计竞赛C题获奖作品FPGA外围接口双口RAM部分源码-07 National Undergraduate Electronic Design Contest winning entries C title peripheral interface FPGA dual-port RAM part of source
Platform: | Size: 1024 | Author: SRY | Hits:

[VHDL-FPGA-Verilog] 1_ADDER

Description: vhdl addr
Platform: | Size: 22528 | Author: | Hits:

[VHDL-FPGA-Verilog] DDRSDRAM

Description: 基于FPGA 实现DDR SDRAM的控制器-FPGA-based realization of DDR SDRAM controller
Platform: | Size: 474112 | Author: 张宁 | Hits:

[VHDL-FPGA-Verilog] t26a_ibis

Description: ddr sdram 的控制代码，采用VHDL语言书写-ddr sdram control code, the use of VHDL language
Platform: | Size: 281600 | Author: zxb | Hits:

[Windows Develop] ddr_sdr_V1_0

Description: 关于DDR控制器方面的，可以看看，里面有较完整的代码和说明。-On the DDR controllers, you can see, there are more complete code and description.
Platform: | Size: 38912 | Author: yuhl | Hits:

[Other] 128Mb_ddr

Description: 128Mb DDR verilog源程序-128Mb DDR verilog source code
Platform: | Size: 23552 | Author: tiantian | Hits:

[VHDL-FPGA-Verilog] tips_vhdl

Description: 包含图像采集、i2c设计及混合语言仿真、DDR控制器以及一些小程序，供学习使用-Includes image acquisition, i2c design and mixed-language simulation, DDR controller, and a number of small programs for learning to use
Platform: | Size: 7177216 | Author: 陈少华 | Hits:

[VHDL-FPGA-Verilog] ddr-sdram

Description: DDR SDRAM控制器verilog代码及中文说明文档,对DDR开发很有用的哈。-Verilog source code for DDR SDRAM controler design,including guide book in chinese.
Platform: | Size: 923648 | Author: runxin | Hits:

[Disk Tools] ddr_contrl

Description: DDR controller source code and test bench in VerilogHDL. It is very useful to develop DDR project.-DDR controller source code and test bench in VerilogHDL.
Platform: | Size: 4096 | Author: leos | Hits:

[SCM] DDRcontrol

Description: DDR控制器的设计参考，包含有中文说明文档-DDR controller design for reference, including documentation in Chinese
Platform: | Size: 475136 | Author: 林果 | Hits:

[VHDL-FPGA-Verilog] DDR_prj

Description: DDR控制器的VHDL源代码.采用FPGA实现DDR接口控制器,适用于Altera的FPGA。-DDR controller VHDL source code. FPGA implementation using DDR interface controller for Altera' s FPGA.
Platform: | Size: 4781056 | Author: zhanghe | Hits:

[VHDL-FPGA-Verilog] ddr

Description: DDR SDRAM 控制器 VHDL代码，可支持32bits数据总线-VHDL code for DDR SDRAM controller, supporting 32bits data bus
Platform: | Size: 9216 | Author: chen | Hits:
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